Interleaved reed solomon coding for home networking

ABSTRACT

A method of transmitting and receiving data packets over a channel susceptible to random burst and/or white gaussian noise channel errors. Each data packet is encoded to form error correctable encoded data packets. Each error correctable encoded data packet is interleaved to form interleaved error correctable encoded data packets. Each interleaved error correctable encoded data packet is modulated to form modulated interleaved error correctable encoded data packets. Each modulated interleaved error correctable encoded data packet is transmitted over the channel. The channel can be a telephone line. The encoding includes performing Reed Solomon encoding on each data packet to form Reed Solomon error correctable encoded data packets. Each data packet is cyclic redundancy check encoded prior to performing Reed Solomon encoding. Modulated interleaved error correctable encoded data packets are received from the channel. Each modulated interleaved error correctable encoded data packet is demodulated to form demodulated interleaved error correctable encoded data packets. Each demodulated error correctable encoded data packet is deinterleaved to form deinterleaved demodulated error correctable encoded data packets. Each deinterleaved demodulated error correctable encoded data packet is decoded to extract each transmitted data packet. The decoding includes performing Reed Solomon decoding on each deinterleaved demodulated error correctable encoded data packet to form Reed Solomon decoded data packets. Each Reed Solomon decoded data packet is cyclic redundancy check decoded after performing Reed Solomon decoding.

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This patent application is a continuation of U.S. patentapplication Ser. No. 09/573,243 filed on May 18, 2000.

BACKGROUND OF THE INVENTION

[0002] The present invention relates to the field of data encoding anddecoding, and in particular, data encoding/decoding for use in a homenetwork communications system.

[0003] As computers become more and more cost effective for the everydayconsumer and for small businesses, such computers become more plentifulfor use within local area environments such as homes, office buildingsand the like. For example, within a home a person with a computer in thebedroom, and another in the living room, may want to share common files,utilize a common digital subscriber line (DSL), or otherwise transferinformation between the computers. Accordingly, various technologies arebeing developed for computer interconnection of multiple computerslocated within such environments. One example of such technologies arethe Home Phoneline Network Alliance (HPNA) specifications for local areanetwork (LAN) computer interconnection which utilize existing telephonelines within the local environment for the transmission of data packetsbetween the computers. Another example is the use of existing powerlines within the home as a transmission medium.

SUMMARY OF THE INVENTION

[0004] A method of transmitting and receiving data packets over achannel susceptible to random burst, and/or even additive white gaussiannoise, channel errors is provided. Each data packet is encoded to formerror correctable encoded data packets. Each error correctable encodeddata packet is interleaved to form interleaved error correctable encodeddata packets. Each interleaved error correctable encoded data packet ismodulated to form modulated interleaved error correctable encoded datapackets. Each modulated interleaved error correctable encoded datapacket is transmitted over the channel. The channel can be a telephoneline. The encoding includes performing Reed Solomon encoding on eachdata packet to form Reed Solomon error correctable encoded data packets.Each data packet is cyclic redundancy check encoded prior to performingReed Solomon encoding. Modulated interleaved error correctable encodeddata packets are received from the channel. Each modulated interleavederror correctable encoded data packet is demodulated to form demodulatedinterleaved error correctable encoded data packets. Each demodulatederror correctable encoded data packet is deinterleaved to formdeinterleaved demodulated error correctable encoded data packets. Eachdeinterleaved demodulated error correctable encoded data packet isdecoded to extract each transmitted data packet. The decoding includesperforming Reed Solomon decoding on each deinterleaved demodulated errorcorrectable encoded data packet to form Reed Solomon decoded datapackets. Each Reed Solomon decoded data packet is cyclic redundancycheck decoded after performing Reed Solomon decoding.

[0005] A system for transmitting and receiving data packets over achannel susceptible to random burst and/or white gaussian noise channelerrors is also provided. A transmitter and a receiver are coupled to thechannel.

[0006] The transmitter includes:

[0007] an encoder for encoding each data packet to form errorcorrectable encoded data packets;

[0008] an interleaver coupled to the encoder for interleaving each errorcorrectable encoded data packet to form interleaved error correctableencoded data packets;

[0009] a modulator coupled to the interleaver for modulating eachinterleaved error correctable encoded data packet to form modulatedinterleaved error correctable encoded data packets.

[0010] The receiver includes:

[0011] a demodulator for receiving modulated interleaved errorcorrectable encoded data packets from the channel and demodulating eachmodulated interleaved error correctable encoded data packet to formdemodulated interleaved error correctable encoded data packets;

[0012] a deinterleaver coupled to the demodulator for deinterleavingeach demodulated error correctable encoded data packet to formdeinterleaved demodulated error correctable encoded data packets;

[0013] a decoder coupled to the deinterleaver for decoding eachdeinterleaved demodulated error correctable encoded data packet toextract each transmitted data packet.

DESCRIPTION OF THE DRAWINGS

[0014]FIG. 1 shows in block diagram form a home networking environmentwithin which the present invention can be implemented.

[0015]FIG. 2 shows in block diagram form an embodiment of the presentinvention.

[0016]FIG. 3 shows in block diagram form an embodiment of an intrapacketencoder in accordance with the present invention.

[0017]FIG. 4 shows in block diagram form the operation of an interleaverin accordance with the present invention.

[0018]FIG. 5 shows in block diagram form an embodiment of an intrapacketdecoder in accordance with the present invention.

[0019]FIG. 6 shows in block diagram form an embodiment of a CRC encoderin accordance with the present invention.

[0020]FIG. 7 shows in block diagram form an embodiment of a CRC decoderin accordance with the present invention.

[0021]FIG. 8 shows in block diagram form an embodiment of a Reed Solomonencoder in accordance with the present invention.

[0022]FIG. 9 shows in block diagram form an embodiment of a Reed Solomondecoder in accordance with the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0023]FIG. 1 depicts a typical home environment. Home network 10includes existing (installed) plain old telephone service (POTS)wiring12, network clients 14, the computer port side of modem 16 and fax 18.POTS wiring 12 provides wiring infrastructure used to network multipleclients at a customer premises (e.g., home) 20. POTS wiring 12 can beconventional unshielded twisted pair (UTP) wiring that is generallyrouted internally in the walls of the customer premises 20 to variouslocations (e.g., rooms) within the customer premises. Subscriber loop22(also called a “local loop”) is a physical wiring link that directlyconnects an individual customer premises 20 to the Central Officethrough telephone network interface 24, a demarcation point between theinside and outside of customer premises 20.

[0024] Of particular importance for these networks are systems thatprovide communication between computers as reliably and with as high adata rate as possible. Such reliability necessitates combating theintroduction of errors in data packets that are transmitted betweencomputers. Such errors can arise from various electrical signals whichcan occur from electrical devices within the home, for example, impulsenoise from a refrigerator, or from a phone ringing. These types ofelectrical appliances generate electrical signals which will couple intothe UTP or whatever medium that is being used to transmit the databetween the computers which are communicating. Such a ringing phonegenerates an electrical impulse signal which can corrupt a portion ofthe data packet being transmitted. Such errors are localized in time andcorrupt a small segment of the data being transferred back and forth.These types of errors are generally referred to a “error bursts”.Channels over which data is transmitted that have such errors aregenerally referred to as “bursty error channels”.

[0025] Further, even in channels where bursts are not received,distortions can occur from additive white gaussian noise.

[0026] While within the HPNA specifications there is provided a meansfor the system to adapt itself to changes in the channel when there issuddenly an increase in noise or there is some other disturbance that iscausing gross changes in the wiring, however, such adaptation does takesome time. Therefore, during the time period from when the channelchanges occur until the computers catch up (adapt), there may be quite afew errors occurring.

[0027] Also, in accordance with the HPNA specifications, within thereceiver there is a device called the decision feedback equalizer. Itmakes tentative decisions as to what bits were being sent and then triesto subtract out the sources of errors based upon the tentativedecisions. However, in the case where the tentative decisions are notvery good, the attempt to subtract out the errors tends to createfurther errors. In other words, it actually hurts the system rather thanhelping it.

[0028] Reiterating, these types of error events are ones that aregenerally localized in time, namely, they don't happen at a regularoccurrence. Most of the time the transmission will be acceptable, butoccasionally there can be a bunch of errors grouped together. At therate at which these errors typically occur, the transmitted packets willsee at most one error burst.

[0029] At present, the HPNA specifications do not use any errorcorrecting code system. It uses a simple well-known cyclic redundancycheck (CRC). In accordance with the CRC process a number is developedbased upon the statistical computation on the bytes which are in thepacket. At the receive end, if the number matches a preset number, thereis a presumption that the number is correct and, therefore, that thereare not any errors. If the number does not match, there is a presumptionthat there are errors. The receiver thereupon indicates that the packetshould be discarded and requests that the transmitter resend the packet.

[0030] Therefore, a need exists for error correcting codes which canform part of the technologies being developed which utilize telephonewiring (or alternatively power line wiring) within the home or office.If error correcting codes in accordance with the present invention areimplemented, fewer packets will have errors that require aretransmission of the packet. As such, more of the packets will arrivecorrectly at the receiver on the first try, and thereby result in ahigher data rate, and, in turn, provide a net increase in system datathroughput.

[0031] Referring to FIG. 2, there is depicted in block diagram form anembodiment of the present invention wherein source computer 14 a isdesirous of communicating via a home networking protocol (e.g., HPNAspecification versions 1.0 and 2.0) with destination computer 14 b overa channel 12 a. The environment in which the embodiment operates issimilar to that depicted in FIG. 1. Source computer 14 a wishes to senda packet(s) of data to destination computer 14 b. Source computer 14 aincludes data source 30 and transmitter 32. Transmitter 32 is typicallya chip residing on a board within source computer 14 a. Transmitter 32includes intrapacket encoder 34 and modulator 36. Intrapacket encoder 34performs Reed Solomon encoding to help protect the packet from errors.Source 30 provides the data packet to intrapacket encoder 34, whichencodes the packet, as described in more detail below. The encodedpacket gets modulated by modulator 36 and gets sent over channel 12 a todestination computer 14 b. Destination computer 14 b includes receiver38. Receiver 38 has a demodulator 40 and intrapacket decoder 42.Demodulator 40 demodulates the received encoded packet in accordancewith the home networking protocol modulation/demodulation implemented asset forth in the HPNA specification, namely, Quadrature AmplitudeModulation (QAM). The modulation uses constellation sizes from 4 QAM upto 256 QAM. Intrapacket decoder 42 receives the demodulated encodedpacket, decodes the encoded packet and provides a correct packet ofbytes to packet destination 44.

[0032] The modulation/demodulation/transmission/reception are asprovided by the commercially available Broadcom Model No. 4210HomeNetworking Controller chip.

[0033] Referring to FIG. 3, intrapacket encoder 34 is depicted in blockdiagram form. Intrapacket encoder 34 includes CRC encoder 46, ReedSolomon encoder 48 and interleaver 50. A packet 45 arriving atintrapacket encoder 34 is encoded by CRC encoder 46 in the mannerbriefly described above, adding bytes so that the receiver can laterdetect whether the packet is error free or not. Since the destinationcomputer does not have any knowledge as to what is being sent by thesource computer, the destination computer needs this mechanism todetermine if the data received is real data or not. After the bytes getadded by CRC encoder 46, the packet gets passed on to Reed Solomonencoder 48. Reed Solomon encoder 48 adds redundancy to protect againstpacket errors. The added redundancy is provided by the well-known ReedSolomon process, allowing the receiver to correct certain types oferrors which will occur in the packet being transmitted. The addedredundancy packet is then passed on to interleaver 50. Interleaver 50reorders the bytes to protect them against burst errors. As such, whenan error burst occurs it won't affect the same group of bytes that theReed Solomon encoder outputs, but will be dispersed over a number ofbytes.

[0034] Still referring to FIG. 3, CRC encoder 46 takes in a packet ofthe information bytes and runs through a computation which generates aseries of check sum bytes for error detection use at the receiver. Thisprocess provides a good indication at the receiver as to whether thepacket is error-free with little added redundancy. At the receiver, thesame computation is performed and the check sum bytes seen at thedecoder in the receiver are examined to determine if they match thecheck sum bytes added by CRC encoder 46. If the check sum bytes match,such indicates that the packet is good, that is, it's error-free anduseable by the destination computer. Otherwise, if the check sum bytesdo not match, such indicates that the packet is not good, and that aretransmission is needed. The operation of CRC encoder 46, which iscurrently implemented pursuant to the HPNA specifications via softwareencoding, is described in further detail below.

[0035] Still referring to FIG. 3, Reed Solomon encoder 48 implements awell-known class of error correcting codes wherein a block of bytes fromwithin the packet are taken and from which a set of parity bytes iscomputed. These parity bytes are added on to the packet, giving addedredundancy to protect the packet against errors which may occur over thetransmission channel. Encoding is performed within each packet. Theencoding is not stretched across multiple packets. In other words, eachpacket is encoded as its own entity. One of the parameters associatedwith the Reed Solomon encoding is the Galois field size. Galois fieldsize involves math theory and abstract algebra concepts as to how tomanipulate these bytes, that is, the various symbols within a ReedSolomon codeword. The number of bits are specified which correspond to acoordinate of the code word. In accordance with the present inventionGalois field 256, GF(256), is chosen, wherein each byte is a coordinateof the codeword. This Galois field size provides the convenience ofhaving computations based on byte boundaries. Each byte is a coordinateof a codeword and the modulation scheme utilizes constellation sizesfrom QPSK, which has four elements, up to 256 QAM, which has eightelements.

[0036] As such, each byte will contain at least one symbol which will goout onto the channel. Therefore, an error burst which affects multiplechannel symbols will only affect a small number of bytes. For example,if there is a transmission of two bits per channel symbol, and the bursterror affects four channel symbols, the burst error will be confined toone byte.

[0037] By having a large Galois field size there is provided theadvantage of “trapping” the bursts which occur in the channel to a verysmall fraction of the codeword, i.e., within a few codeword coordinates,allowing it to be easily correctable.

[0038] This choice of Galois field size allows an efficientimplementation in software and an efficient use of memory. As part ofthe Reed Solomon encoding process, the code rate and codeword size aredetermined. The code rate is the division of the number of informationcoordinates by the number of codeword coordinates. Given the rate atwhich errors are expected to be seen in the channel, the Reed Solomoncode rate can be 4/5 to 8/9. The codeword size is the number of byteswhich constitute a codeword. Reed Solomon codewords are naturallydefined such that the codeword size is one less than the Galois fieldsize. As such, when using GF(256), the corresponding Reed Solomoncodeword would normally be 255 bytes long. However, in accordance withthe present invention, the Reed Solomon codeword size can be reduced,for example to 40 bytes, without sacrificing code rate, resulting in adecreased decoder complexity. Further, systematic encoding isimplemented by Reed Solomon encoder 48, wherein the series of byteswhich come in don't get changed, but merely additional bytes arecomputed which get appended to the end of the packet being encoded,providing the added redundancy. As such, additional computation is notneeded on the bytes which come in. The Reed Solomon encoding isimplemented in C language as part of driver software for the BroadcomModel No. 4210 HomeNetworking Controller chip.

[0039] Referring to FIGS. 3 and 4, interleaver 50 is described.

[0040] Interleaver 50 reorders bytes within a packet after encoding toprotect it against burst errors. In FIG. 4, there is depicted an exampleof a 3×4 interleaver. Byte stream sequence 52 from Reed Solomon encoder48 is shown entering interleaver 50 in order. Interleaver 50 is inessence a memory buffer wherein the bytes are read in by rows, forexample, bytes c1, c2, c3, c4 being read into the first row; bytes c5,c6, c7, c8 being read into the second row; and bytes c9, c10, c11, c12being read into the third row. Interleaver 50 then outputs, as read outby columns, reordered byte stream sequence 54. The size of interleaver50 is chosen such that the number of columns is equal to the codewordsize and the number of rows is equal to the maximum size of the packetthat can be handled. A smaller than maximum packet will accordingly notfill all the rows.

[0041] Referring to FIG. 5, intrapacket decoder 42 is shown in moredetail. Intrapacket decoder 48 includes deinterleaver 56, Reed Solomondecoder 58 and CRC decoder 60. Coming in from demodulator 40, the bytesare deinterleaved by deinterleaver 56 so that the bytes are reordered inthe proper order for the Reed Solomon decoding that follows. ReedSolomon decoder 58 corrects errors that have occurred within the packet.CRC decoder 60 performs computations on the bytes of the packet in orderto determine whether or not the packet was error-free.

[0042] Still referring to FIG. 5, deinterleaver 56 is discussed in moredetail. Deinterleaver 56 is in essence the inverse of interleaver 50described above. Deinterleaver 56 disperses corrupted bytes over manycodewords. That is, when there is a number of bytes clumped togetherwhich have errors in them, after being processed by the deinterleaver,the bytes with errors in them are dispersed throughout the entire packetbecause they are going to be reordered and spread apart. Rather thanrequiring Reed Solomon decoder 58 to be able decode one localized burst,the decoder will see much more random errors and fewer errors percodeword block. As such, this aspect reduces required error correctionstrength of the Reed Solomon decoder and, as a result, its complexity.The same structure that is used in the interleaver is used, but inreverse, namely, with data read in as columns and read out as rows.

[0043] With regard to Reed Solomon decoder 58, it corrects a number oferrors up to half the number of parity bytes per block, that is, halfthe number of bytes of redundancy added per block. As can be seen, withthe combination of Reed Solomon encoding and interleaving, a burst erroris dispersed over many codewords and a less powerful code is needed tocorrect all the errors within the packet. Similar to the encoder, thedecoder is implemented in C language as part of the software driver forthe Broadcom Model No. 4210 HomeNetworking chip set.

[0044] The Reed Solomon decoder implements the basic steps implementinga typical Reed Solomon decoding algorithm. Error coordinates need to belocated within a codeword, that is, determining which bytes within acodeword are in error. Syndromes are first computed, which arequantities computed from receive coordinates and prove helpful in thealgorithm process. The error locator polynomial is then constructedusing the well-known Berlekamp Massey algorithm, which gives a quantitythat is passed on to the next step, namely, performing a Chien search.The Chien search determines which bytes within a codeword had an error.Once it is determined which bytes were in error, the magnitude of theerror is then determined, so that the error can be corrected (subtractedoff), for example, by an algorithm developed by Forney. Once thecorrections are made to the codeword, the redundant bytes (parity bytesadded in at the encoder) are removed.

[0045] Still referring to FIG. 5, CRC decoder 60 runs a computation onthe packet it receives in order to determine whether or not it haserrors. It then compares the result of the computation with the last fewbytes of the packet, and if there is a match, the packet is error-freeand can be used by the destination computer. If it doesn't match, thepacket is indicated as being invalid and that a valid packet needs to beresent.

[0046] With the combination of the Reed Solomon encoding andinterleaving, the amount of time that good packets are seen at the CRCdecoder increases and the need for packet retransmissions is reduced.Such will thereby improve the overall throughput of the entire system.

[0047] Referring now to FIGS. 6 and 7 CRC encoder 46 and its counterpartCRC decoder 60 are described in more detail. Referring to FIG. 6, CRCencoder 46 utilizes the standard CRC-32 encoder typically implemented inEthernet and compression algorithm systems. It provides a relativelystraightforward way to add some minimal redundancy to the transmitteddata to determine whether there are any errors at the receiver. As anoperational example, consider packet 62 containing L bytes u1, u2, . . .uL to be encoded. The first four bytes u1, u2, u3, u4 have the bitswithin them complemented by inverter 64, namely bits that are 0 become 1and bits that are 1 become 0. This is undertaken because the CRC encoderis unable to detect a leading run of 0s, that is, it is unable to tellwhether there is one 0 or a long string of 0s. Accordingly, thecomplementing is performed to start the encoder in a situation where itwould see a string of 0s at the outset. The complemented bytes, alongwith the rest of the packet are loaded into buffer 66 while feeding backa generator polynomial, as indicated by numeral 68, a procedure whichperforms a mathematical computation on the bytes. As one byte at a timeis cycled through buffer 66, the contents of the buffer, a four bytebuffer for example, are constantly changing based on the bytes that comeinto the buffer and the computation performed thereon by the CRC-32feedback polynomial. Once the end of the packet is reached, inverter 70performs another complementing. The four byte buffer contents ascomplemented will be taken as parity bytes to be associated with thepacket. These four parity bytes 72 will be a unique four byte check sumelement for the packet and are concatenated at the end of the packet.

[0048] Referring to FIG. 7, corresponding CRC decoder 60 is described inmore detail. CRC decoder 60 is implemented in a very similar fashion tothat of CRC encoder 46. The last four bytes are not concerned with atfirst. The other L bytes of the sequence u1, u2 , . . . ul sequence 62are re-encoded in the same way as at encoder 46. That is, the first fourbytes u1, u2, u3, u4 have the bits within them complemented by inverter74, namely bits that are 0 become 1 and bits that are 1 become 0. Thecomplemented bytes, along with the rest of the packet are loaded intobuffer 76 while feeding back a generator polynomial, as indicated bynumeral 78, a similar CRC-32 mathematical computation procedureperformed on the bytes. As one byte at a time is cycled through buffer76, the contents of the similar four byte buffer constantly change basedon the bytes that come into the buffer and the computation performedthereon by the CRC-32 feedback polynomial. Once the end of the packet isreached, inverter 80 performs another complementing function resultingin bytes 82. When a comparison is made at comparator 84 between bytes 82and bytes 72, if these bytes match the packet is considered valid. Ifthese bytes do not match, a error is indicated and a retransmission ofthe packet is requested from the transmitter by a standard feedbackacknowledgment process.

[0049] Referring now to FIGS. 8 and 9 Reed Solomon encoder 48 and itscounterpart Reed Solomon decoder 58 are described in more detail.Referring to FIG. 8, consider packet 86 to be processed. Encoder 48breaks packet 86 into K byte blocks, where K is a parameter associatedwith the Reed Solomon encoder. Redundancy is then added to the K bytesand expands them into N byte segments of the packet. For example,typical values for N and K can be N=40 and K=32, providing, for example,a 4/5 code rate, as was previously described. For one segment of thepacket X1 . . . Xk bytes 88 are fed into N-K byte buffer 90.Computations are then performed on the bytes through feedback polynomialg(x), as indicated by numeral 92, a known generator polynomial for theReed Solomon code. The computation provides a series 94 of N-Kredundancy bytes y1 . . . yn-k. The N-K bytes are appended at the end ofthe K bytes X1 . . . Xk. As such, there is provided a coded packet 96,having a series of N byte segments. In the event that the packet doesnot end on a K byte boundary, the end of the packet has 0s added tocomplete the full block up to the boundary. The encoding is then doneover Galois field 256. It should be noted that this encoding is asystematic implementation, wherein the X1 . . . Xk bytes pass throughwithout being modified and, as such, the Y1 . . . Yn-k are onlycalculated. This allows the data that came into the encoder to beprovided directly at the output of the encoder. The systematic coding ishelpful in reducing the number of operations performed both a theencoder and at the decoder.

[0050] Referring to FIG. 9, corresponding Reed Solomon decoder 58 isdescribed in more detail. Decoder 58 performs the inverse operation ofencoder 48. Coded packet 98 having groups of N bytes received at decoder58 have a computation performed on them to obtain decoded packet 100having groups of K bytes. Given the N bytes that are received, thedecoding will attempt to compute the K bytes which most likely led tothe N bytes. Received bytes 102 r1 . . . rn are taken wherein syndromesare computed, as indicated by block 104. The syndromes are intermediateparameters in the decoding algorithm which will be helpful in the laterstages of the processing. After the syndromes are computed, theBerlekamp Massey algorithm is applied, as indicated by block 106,generating an error locator polynomial. This polynomial, a mathematicalconstruct, has as its root values 1 through N, which represent thelocations of the errors within the N byte block. A Chien search, asindicated by block 108, is then performed. A cycling through allpossible values of 1 through N is undertaken in order to determine whatthe roots are of the error locator polynomial and thereby determine theactual error location. Once the error location is determined, the errormagnitude is then determined, so that the errors can be subtracted offand the original K bytes recovered. The standard Forney algorithm, asindicated by block 110, is then performed to compute the errormagnitude. Once the error magnitude and locations are determined, errorevent polynomial 112 e1 . . . en is generated. When the error eventpolynomial is combined with the received bytes, as indicated by block114, a valid N byte Reed Solomon codeword will be produced. From the Nbytes the K bytes are extracted and concatenated and then passed on tothe CRC decoder in the next stage of the decoding process.

[0051] In essence, as set forth above, in accordance with the presentinvention, error correction encoding has been applied to packetsinvolved in home networking transmission to protect the packettransmission from errors that are incurred in home networking channels.Reed Solomon encoding used in conjunction with interleaving helps avoidan impact on the packet transmission resulting from home networkingchannel transmission errors of a bursty nature which can randomly affectbunches of bytes in a row. The present invention provides a significantimprovement in error correction based upon these types of errors.

[0052] It should be noted, that in accordance with the presentinvention, rather than implementing the encoding and the decodingalgorithms in hardware, the encoding and interleaving can be performedin software as part of the software driver for existing commerciallyavailable HPNA specification implemented chip sets, such as the BroadcomModel No. BCM 4210 chip set. This software implementation would notrequire modification of existing hardware and is distinct from otherinterleaved Reed Solomon encoding systems (such as those typically foundin the compact disc audio system) which perform the operations inhardware. Such a software implementation does not impede the performanceof the computers which implement current HPNA specification versions 1.0and 2.0. The central processing unit (CPU) processing power needed toencode, decode, and interleave can be less than 50 percent of the totalprocessing power.

[0053] Those skilled in the art can appreciate that, while oneembodiment of the present invention has been described, variousalternatives can be utilized to practice the invention. For example,different parameters for N and K, different Reed Solomon polynomials,non-systematic rather than systematic encoding, different types ofinterleavers, all can be chosen rather than the aspects set forth in theembodiments described herein.

1. A method of transmitting data packets over a channel susceptible torandom burst and/or white gaussian noise channel errors comprising:encoding each data packet to form error correctable encoded datapackets; interleaving each error correctable encoded data packet to forminterleaved error correctable encoded data packets; modulating eachinterleaved error correctable encoded data packet to form modulatedinterleaved error correctable encoded data packets; and transmittingeach modulated interleaved error correctable encoded data packet overthe channel.